A NOVEL METHOD TO ENHANCE THE LOCK TIME OF A PHASE LOCKED LOOP WITH EXTERNAL CONTROL.
Abstract: Phase Locked
Loops (PLLs) are used extensively in analog and digital applications in the fields of
communication, radio, computers etc. The PLL contains a variable frequency oscillator to
generate the output which is then compared to an input reference signal. The PLL
automatically adjusts its output frequency until the output signal phase matches the
reference phase within desired ... read morelimits. The time taken to achieve this phase
synchronization is known as the "lock time" of the PLL. In this work a novel technique
has been proposed to enhance the lock time of a standard Integrated Phase Lock Loop
(PLL) with a specially designed "Aided Acquisition (AA)" control block. In a real life
situation the PLL block is often provided to the user as a custom "Intellectual Property
(IP)" and it is not practical to control and/or probe nodes internal to this block. So
in this novel scheme the AA block was specifically designed to influence the PLL
behavior externally without breaking the structural integrity of the PLL loop. Design of
this AA block has been discussed and the simulation results compared with that of a
traditional PLL. From the simulations performed it was observed that externally
influencing the PLL loop with the AA device can reduce the lock acquisition time by as
much as 89% depending on the initial state of the
Thesis (M.S.)--Tufts University, 2011.
Submitted to the Dept. of Electrical Engineering.
Advisor: Chorng Chang.
Committee: Chorng Chang, Douglas Preis, and Ken Szajda.
Keywords: Engineering, and Electrical engineering.read less